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MX27C4100/27C4096
4M-BIT [512K x 8/256K x 16] CMOS EPROM
FEATURES
* 256K x 16 organization(MX27C4096, JEDEC pin out) * 512K x 8 or 256K x 16 organization(MX27C4100, * * * *
ROM pin out compatible) +12.5V programming voltage Fast access time: 100/120/150 ns Totally static operation Completely TTL compatible
* Operating current: 60mA * Standby current: 100uA * Package type:
- 40 pin ceramic DIP - 40 pin plastic DIP - 44 pin PLCC - 40 pin SOP
GENERAL DESCRIPTION
The MX27C4100/4096 is a 5V only, 4M-bit, ultraviolet Erasable Programmable Read Only Memory. It is organized as 256K words by 16 bits per word(MX27C4096), 512K x 8 or 256K x 16(MX27C4100), operates from a single + 5 volt supply, has a static standby mode, and features fast single address location programming. All programming signals are TTL levels, requiring a single pulse. For programming outside from the system, existing EPROM programmers may be used. The MX27C4100/ 4096 supports a intelligent fast programming algorithm which can result in programming time of less than two minutes. This EPROM is packaged in industry standard 40 pin dual-in-line packages, 40 lead SOP, and 44 lead PLCC packages.
PIN CONFIGURATIONS
SOP/CDIP/PDIP(MX27C4100)
A17 A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE/VPP GND Q15/A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC
BLOCK DIAGRAM (MX27C4100)
CE OE BYTE/VPP
CONTROL LOGIC
OUTPUT BUFFERS
Q0~Q14 Q15/A-1
A0~A17 ADDRESS INPUTS
. . . . . . . .
MX27C4100
Y-DECODER
X-DECODER
. . . . . . . .
Y-SELECT
4M BIT CELL MAXTRIX
VCC GND
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MX27C4100/27C4096
PIN CONFIGURATIONS
PLCC(MX27C4096)
VCC VPP Q13 Q14 Q15 A17 A16 A15 A14 NC CE
PIN CONFIGURATIONS
CDIP/PDIP(MX27C4096)
VPP CE Q15 Q14 Q13 Q12 Q11 Q10 Q9 Q8 GND Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VCC A17 A16 A15 A14 A13 A12 A11 A10 A9 GND A8 A7 A6 A5 A4 A3 A2 A1 A0
Q12 Q11 Q10 Q9 Q8 GND NC Q7 Q6 Q5 Q4
7
6
1 44
40 39
A13 A12 A11 A10 A9
12
MX27C4096
34
GND NC A8 A7 A6
17 18
Q3 Q2 Q1 Q0 OE
23
NC A0 A1 A2 A3
29 28
A4
A5
BLOCK DIAGRAM (MX27C4096)
CE OE CONTROL LOGIC OUTPUT BUFFERS
Q0~Q15
. . A0~A17 ADDRESS INPUTS . . . . . .
Y-DECODER
. . . . . . . .
Y-SELECT
X-DECODER
4M BIT CELL MAXTRIX
VCC GND
VPP
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MX27C4100/27C4096
PIN DESCRIPTION(MX27C4100)
SYMBOL A0~A17 Q0~Q14 CE OE BYTE/VPP Q15/A-1 VCC GND PIN NAME Address Input Data Input/Output Chip Enable Input Output Enable Input Word/Byte Selection/Program Supply Voltage Q15(Word mode)/LSB addr. (Byte mode) Power Supply Pin (+5V) Ground Pin
PIN DESCRIPTION(MX27C4096)
SYMBOL A0~A17 Q0~Q15 CE OE VPP VCC GND PIN NAME Address Input Data Input/Output Chip Enable Input Output Enable Input Program Supply Voltage Power Supply Pin (+5V) Ground Pin
TRUTH TABLE OF BYTE FUNCTION(MX27C4100)
BYTE MODE(BYTE = GND)
CE H L L OE X H L Q15/A-1 X X A-1 input MODE Non selected Non selected Selected Q0-Q7 High Z High Z DOUT SUPPLY CURRENT Standby(ICC2) Operating(ICC1) Operating(ICC1)
WORD MODE(BYTE = VCC)
CE H L L NOTE : X = H or L OE X H L Q15/A-1 High Z High Z DOUT MODE Non selected Non selected Selected Q0-Q14 High Z High Z DOUT SUPPLY CURRENT Standby(ICC2) Operating(ICC1) Operating(ICC1)
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FUNCTIONAL DESCRIPTION
THE ERASURE OF THE MX27C4100/4096 The MX27C4100/4096 is erased by exposing the chip to an ultraviolet light source. A dosage of 15 W seconds/cm2 is required to completely erase a MX27C4100/4096. This dosage can be obtained by exposure to an ultraviolet lamp - wavelength of 2537 Angstroms (A) - with intensity of 12,000 uW/cm2 for 15 to 20 minutes. The MX27C4100/ 4096 should be directly under and about one inch from the source and all filters should be removed from the UV light source prior to erasure. It is important to note that the MX27C4100/4096, and similar devices, will be cleared for all bits of their programmed states with light sources having wavelengths shorter than 4000 A. Although erasure times will be much longer than that with UV sources at 2537 A, nevertheless the exposure to fluorescent light and sunlight will eventually erase the MX27C4100/4096 and exposure to them should be prevented to realize maximum system reliability. If used in such an environment, the package window should be covered by an opaque label or substance. additional pulse is applied for a maximum of 25 pulses. This process is repeated while sequencing through each address of the device. When the programming mode is completed, the data in all address is verified at VCC = VPP = 5V 10%.
PROGRAM INHIBIT MODE Programming of multiple MX27C4100/4096's in parallel with different data is also easily accomplished by using the Program Inhibit Mode. Except for CE and OE, all like inputs of the parallel MX27C4100/4096 may be common. A TTL low-level program pulse applied to an MX27C4100/4096 CE input with VPP = 12.5 0.5 V will program the MX27C4100/4096. A high-level CE input inhibits the other MX27C4100/4096s from being programmed.
PROGRAM VERIFY MODE Verification should be performed on the programmed bits to determine that they were correctly programmed. The verification should be performed with OE and CE at VIL(for MX27C4096), OE at VIL and CE at VIH(for MX27C4100) and VPP at its programming voltage.
THE PROGRAMMING OF THE MX27C4100/4096 When the MX27C4100/4096 is delivered, or it is erased, the chip has all 4M bits in the "ONE" or HIGH state. "ZEROs" are loaded into the MX27C4100/4096 through the procedure of programming. For programming, the data to be programmed is applied with 16 bits in parallel to the data pins. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. When programming an MXIC EPROM, a 0.1uF capacitor is required across VPP and ground to suppress spurious voltage transients which may damage the device. AUTO IDENTIFY MODE The auto identify mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and device type. This mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25 5C ambient temperature range C that is required when programming the MX27C4100/ 4096. To activate this mode, the programming equipment must force 12.0 0.5 V on address line A9 of the device. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during auto identify mode. Byte 0 ( A0 = VIL) represents the manufacturer code, and byte 1 (A0 = VIH), the device identifier code. For the MX27C4100/4096, these two identifier bytes are given in the Mode Select Table. All identifiers for manufacturer
FAST PROGRAMMING The device is set up in the fast programming mode when the programming voltage VPP = 12.75V is applied, with VCC = 6.25 V and OE = VIH (Algorithm is shown in Figure 1). The programming is achieved by applying a single TTL low level 100us pulse to the CE input after addresses and data line are stable. If the data is not verified, an
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MX27C4100/27C4096
and device codes will possess odd parity, with the MSB (Q15) defined as the parity bit. 1. Low memory power dissipation, 2. Assurance that output bus contention will not occur. It is recommended that CE be decoded and used as the primary device-selecting function, while OE be made a common connection to all devices in the array and connected to the READ line from the system control bus. This assures that all deselected memory devices are in their low-power standby mode and that the output pins are only active when data is desired from a particular memory device.
READ MODE The MX27C4100/4096 has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable (CE) is the power control and should be used for device selection. Output Enable (OE) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that addresses are stable, address access time (tACC) is equal to the delay from CE to output (tCE). Data is available at the outputs tOE after the falling edge of OE's, assuming that CE has been LOW and addresses have been stable for at least tACC - t OE.
SYSTEM CONSIDERATIONS During the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1 uF ceramic capacitor (high frequency, low inherent inductance) should be used on each device between Vcc and GND to minimize transient effects. In addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7 uF bulk electrolytic capacitor should be used between VCC and GND for each eight devices. The location of the capacitor should be close to where the power supply is connected to the array.
WORD-WIDE MODE With BYTE/VPP at VCC 0.2V outputs Q0-7 present data Q0-7 and outputs Q8-15 present data Q8-15, after CE and OE are appropriately enabled.
BYTE-WIDE MODE With BYTE/VPP at GND 0.2V, outputs Q8-15 are tristated. If Q15/A-1 = VIH, outputs Q0-7 present data bits Q8-15. If Q15/A-1 = VIL, outputs Q0-7 present data bits Q0-7.
STANDBY MODE The MX27C4100/4096 has a CMOS standby mode which reduces the maximum VCC current to 100 uA. It is placed in CMOS standby when CE is at VCC 0.3 V. The MX27C4100/4096 also has a TTL-standby mode which reduces the maximum VCC current to 1.5 mA. It is placed in TTL-standby when CE is at VIH. When in standby mode, the outputs are in a high-impedance state, independent of the OE input.
TWO-LINE OUTPUT CONTROL FUNCTION To accommodate multiple memory connections, a twoline control function is provided to allow for:
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MX27C4100/27C4096
MODE SELECT TABLE (MX27C4096)
PINS MODE Read Output Disable Standby (TTL) Standby (CMOS) Program Program Verify Program Inhibit Manufacturer Code(3) Device Code(3) NOTES: 1. VH = 12.0 V 0.5 V 2. X = Either VIH or VIL CE VIL VIL VIH VCC0.3V VIL VIH VIH VIL VIL OE VIL VIH X X VIH VIL VIH VIL VIL A0 X X X X X X X VIL VIH A9 X X X X X X X VH VH VPP VCC VCC VCC VCC VPP VPP VPP VCC VCC OUTPUTS DOUT High Z High Z High Z DIN DOUT High Z 00C2H 0151H
3. A1 - A8 = A10 - A17 = VIL(For auto select) 4. See DC Programming Characteristics for VPP voltage during programming.
MODE SELECT TABLE (MX27C4100)
BYTE/ MODE Read (Word) Read (Upper Byte) Read (Lower Byte) Output Disable Standby Program Program Verify Program Inhibit Manufacturer Code(3) Device Code(3) CE VIL VIL VIL VIL VIH VIL VIH VIH VIL VIL OE VIL VIL VIL VIH X VIH VIL VIH VIL VIL A9 X X X X X X X X VH VH A0 X X X X X X X X VIL VIH Q15/A-1 Q15 Out VIH VIL High Z High Z Q15 In Q15 Out High Z 0B 1B VPP(5) VCC GND GND X X VPP VPP VPP VCC VCC Q8-14 Q8-14 Out High Z High Z High Z High Z Q8-14 In Q8-14 Out High Z 00H 38H Q0-7 Q0-7 Out Q8-15 Out Q0-7 Out High Z High Z Q0-7 In Q0-7 Out High Z C2H 00H
NOTES: 1. VH = 12.0V 0.5V 2. X = Either VIH or VIL 3. A1 - A8, A10 - A17 = VIL(for auto select)
4. See DC Programming Characteristics for VPP voltages. 5. BYTE/VPP is intended for operation under DC Voltage conditions only. 6. Manufacture code = 00C2H Device code = B800H
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MX27C4100/27C4096
FIGURE 1. FAST PROGRAMMING FLOW CHART
START
ADDRESS = FIRST LOCATION
VCC = 6.25V VPP = 12.75V X=0
PROGRAM ONE 100us PULSE
INTERACTIVE SECTION
INCREMENT X
YES X = 25?
NO
FAIL
VERIFY BYTE
?
PASS NO INCREMENT ADDRESS LAST ADDRESS FAIL YES
VCC = VPP = 5.25V
VERIFY SECTION
VERIFY ALL BYTES ?
FAIL
DEVICE FAILED
PASS DEVICE PASSED
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MX27C4100/27C4096
SWITCHING TEST CIRCUITS
DEVICE UNDER TEST
1.8K ohm +5V
CL 6.2K ohm
DIODES = IN3064 OR EQUIVALENT
CL = 100 pF including jig capacitance(30pF for 100 ns parts)
SWITCHING TEST WAVEFORMS
2.0V
AC driving levels
2.0V TEST POINTS 0.8V OUTPUT
0.8V INPUT
AC TESTING: AC driving levels are 2.4V/0.4V for commercial grade , 3.0V/0V for industrial grade. Input pulse rise and fall times are <10ns.
AC driving levels
1.5V
TEST POINTS OUTPUT
1.5V
INPUT
AC TESTING: (1)AC driving levels are 3.0V/0V for both commercial grade and industrial grade. Input pulse rise and fall times are < 10ns. (2)For MX27C4100/4096-10
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MX27C4100/27C4096
ABSOLUTE MAXIMUM RATINGS
RATING Ambient Operating Temperature Storage Temperature Applied Input Voltage Applied Output Voltage VCC to Ground Potential A9 & VPP VALUE -40oC to 85oC -65oC to 125oC -0.5V to 7.0V -0.5V to VCC + 0.5V -0.5V to 7.0V -0.5V to 13.5V NOTICE: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability. NOTICE: Specifications contained within the following tables are subject to change.
DC/AC Operating Conditions for Read Operation
MX27C4100/4096 -10 Operating Temperature Commercial Industrial Vcc Power Supply 0C to 55 C -40C to 85C 5V 5% -12 0C to 70C -40C to 85 C 5V 10% -15 0 to 70C C -40 to 85C C 5V 10%
DC CHARACTERISTICS
SYMBOL VOH VOL VIH VIL ILI ILO ICC3 ICC2 ICC1 IPP PARAMETER Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current VCC Power-Down Current VCC Standby Current VCC Active Current VPP Supply Current Read 2.0 -0.3 -10 -10 MIN. 2.4 0.4 VCC + 0.5 0.8 10 10 100 1.5 60 10 MAX. UNIT V V V V uA uA uA mA mA uA VIN = 0 to 5.5V VOUT = 0 to 5.5V CE = VCC 0.3V CE = VIH CE = VIL, f=5MHz, Iout = 0mA CE = OE = VIL, VPP = 5.5V CONDITIONS IOH = -0.4mA IOL = 2.1mA
CAPACITANCE TA = 25oC, f = 1.0 MHz (Sampled only)
SYMBOL CIN COUT CVPP PARAMETER Input Capacitance Output Capacitance VPP Capacitance TYP. 8 8 18 MAX. 12 12 25 UNIT pF pF pF CONDITIONS VIN = 0V VOUT = 0V VPP = 0V
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MX27C4100/27C4096
AC CHARACTERISTICS
27C4100/4096-10 SYMBOL tACC tCE tOE tDF tOH PARAMETER Address to Output Delay Chip Enable to Output Delay Output Enable to Output Delay OE High to Output Float, or CE High to Output Float Output Hold from Address, CE or OE which ever occurred first MIN. MAX. 100 100 45 30 27C4100/4096-12 MIN. MAX. 120 120 50 35 27C4100/4096-15 MIN. MAX. 150 150 65 50 UNIT ns ns ns ns ns CONDITIONS CE = OE = VIL OE = VIL CE = VIL
0 0
0 0
0 0
AC CHARACTERISTICS(Continued)
27C4100-10 SYMBOL tBHA tOHB tBHZ tBLZ PARAMETER BYTE Access Time BYTE Output Hold Time BYTE Output Delay Time BYTE Output Set Time 10 0 70 10 MIN. MAX. 100 0 70 10 27C4100-12 MIN. MAX. 120 0 70 27C4100-15 MIN. MAX. 150 UNIT ns ns ns ns CONDITIONS
DC PROGRAMMING CHARACTERISTICS TA = 25oC 5C
SYMBOL VOH VOL VIH VIL ILI VH ICC3 IPP2 VCC1 VPP1 PARAMETER Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Leakage Current A9 Auto Select Voltage VCC Supply Current (Program & Verify) VPP Supply Current(Program) Fast Programming Supply Voltage Fast Programming Voltage 6.00 12.5 2.0 -0.3 -10 11.5 MIN. 2.4 0.4 VCC + 0.5 0.8 10 12.5 50 30 6.50 13.0 MAX. UNIT V V V V uA V mA mA V V CE = VIL, OE = VIH VIN = 0 to 5.5V CONDITIONS IOH = -0.40mA IOL = 2.1mA
AC PROGRAMMING CHARACTERISTICS TA = 25oC 5C
SYMBOL tAS tOES tDS tAH tDH tDFP tVPS tPW tVCS tOE PARAMETER Address Setup Time OE Setup Time Data Setup Time Address Hold Time Data Hold Time Output Enable to Output Float Delay VPP Setup Time PGM Program Pulse Width VCC Setup Time Data valid from OE MIN. 2.0 2.0 2.0 0 2.0 0 2.0 95 2.0 150 105 130 MAX. UNIT us us us us us ns us us us ns CONDITIONS
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MX27C4100/27C4096
WEFORMS(MX27C4096)
READ CYCLE(WORD MODE)
ADDRESS INPUTS
tACC
DATA ADDRESS
CE
tCE
OE
tDF
DATA OUT
tOE
VALID DATA
tOH
FAST PROGRAMMING ALGORITHM WAVEFORMS
PROGRAM VIH
PROGRAM VERIFY
Addresses
VIL
tAS
Hi-z DATA IN STABLE DATA OUT VALID
tAH
DATA
tDS VPP1
tDH
tDFP
VPP
VCC tVPS VCC1
VCC
tVCS VCC
VIH
CE
VIL tPW VIH tOES tOE Max
OE
VIL
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MX27C4100/27C4096
WAVEFORMS(MX27C4100)
READ CYCLE (BYTE MODE)
HIGH-Z HIGH-Z
A-1
tACC
tOH
BYTE/VPP
Q0-Q7
VALID DATA
tBHA tOHB
VALID DATA
Q15-Q8
tBHZ tBLZ
VALID DATA
FAST PROGRAMMING ALGORITHM WAVEFORMS
PROGRAM VIH
VERIFY
Addresses
VIL
VALID ADDRESS
tAH tAS
DATA
tDS VPP1
DATA SET
tDH
DATA OUT VALID
tDFP
BYTE/VPP
VCC tVPS VCC1
VCC
VCC VIH
tVCS
CE
VIL tPW VIH tOES tOE
OE
VIL
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MX27C4100/27C4096
ORDERING INFORMATION
CERAMIC PACKAGE
PART NO. ACCESS TIME (ns) MX27C4100DC-10 MX27C4100DC-12 MX27C4100DC-15 MX27C4096DC-10 MX27C4096DC-12 MX27C4096DC-15 MX27C4100DI-10 MX27C4100DI-12 MX27C4100DI-15 MX27C4096DI-10 MX27C4096DI-12 MX27C4096DI-15 100 120 150 100 120 150 100 120 150 100 120 150 OPERATING STANDBY OPERATING PACKAGE CURRENT MAX.(mA) CURRENT MAX.(uA) TEMPERATURE 60 60 60 60 60 60 60 60 60 60 60 60 100 100 100 100 100 100 100 100 100 100 100 100 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C -40C to 85C -40C to 85C -40C to 85C -40C to 85C -40C to 85C -40C to 85C 40 Pin DIP(ROM pin out) 40 Pin DIP(ROM pin out) 40 Pin DIP(ROM pin out) 40 Pin DIP(JEDEC pin out) 40 Pin DIP(JEDEC pin out) 40 Pin DIP(JEDEC pin out) 40 Pin DIP(ROM pin out) 40 Pin DIP(ROM pin out) 40 Pin DIP(ROM pin out) 40 Pin DIP(JEDEC pin out) 40 Pin DIP(JEDEC pin out) 40 Pin DIP(JEDEC pin out)
PLASTIC PACKAGE
PART NO. ACCESS TIME OPERATING (ns) MX27C4100PC-10 MX27C4100PC-12 MX27C4100PC-15 MX27C4100MC-10 MX27C4100MC-12 MX27C4100MC-15 MX27C4096PC-10 MX27C4096PC-12 MX27C4096PC-15 MX27C4096QC-10 MX27C4096QC-12 MX27C4096QC-15 MX27C4100PI-10 MX27C4100PI-12 MX27C4100PI-15 MX27C4100MI-10 MX27C4100MI-12 MX27C4100MI-15 MX27C4096PI-10 MX27C4096PI-12 MX27C4096PI-15 MX27C4096QI-10 MX27C4096QI-12 MX27C4096QI-15 100 120 150 100 120 150 100 120 150 100 120 150 100 120 150 100 120 150 100 120 150 100 120 150 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 STANDBY OPERATING PACKAGE TEMPERATURE CURRENT MAX.(mA) CURRENT MAX.(uA) 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C -40C to 85C -40C to 85C -40C to 85C -40C to 85C -40C to 85C -40C to 85C --40 to 85C C -40C to 85C -40C to 85C -40C to 85C -40C to 85C -40C to 85C
40 Pin DIP(ROM pin out) 40 Pin DIP(ROM pin out) 40 Pin DIP(ROM pin out) 40 Pin SOP(ROM pin out) 40 Pin SOP(ROM pin out) 40 Pin SOP(ROM pin out) 40 Pin DIP(JEDEC pin out) 40 Pin DIP(JEDEC pin out) 40 Pin DIP(JEDEC pin out) 44 Pin PLCC 44 Pin PLCC 44 Pin PLCC 40 Pin DIP(ROM pin out) 40 Pin DIP(ROM pin out) 40 Pin DIP(ROM pin out) 40 Pin SOP(ROM pin out) 40 Pin SOP(ROM pin out) 40 Pin SOP(ROM pin out) 40 Pin DIP(JEDEC pin out) 40 Pin DIP(JEDEC pin out) 40 Pin DIP(JEDEC pin out) 44 Pin PLCC 44 Pin PLCC 44 Pin PLCC
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MX27C4100/27C4096
PACKAGE INFORMATION
40-PIN CERDIP(MSI) WITH WINDOW(600 mil)
ITEM A B C D E F G H I J K L M N O
NOTE:
MILLIMETERS 53.34 max. 1.85 .30 2.54 [TP] .46 .05 48.22 1.40 .05 3.43 .38 .94 .41 5.00 15.494 .127
INCHES 2.100 max. .073 .012 .100 [TP] .018 .002 1.900 .055 .005 .135 .015 .037 .016 .197 .610.005
H G I 1 A N 20 J K O 40 21
14.6558 .0254 .577 .001 .25 .13 0~15 10.668 8.128 .010 .005 0~15 .2 40 .320
F D E C B
L
M
Each lead centerline is located within .25 mm[.01 inch] of its true position [TP] at maximum material condition.
40-PIN PLASTIC DIP(600 mil)
ITEM A B C D E F G H I J K L M
NOTE:
MILLIMETERS 52.54 max. 2.03 [REF] 2.54 [TP] .46 [Typ.] 48.22 1.52 [Typ.] 3.30 .25 .51 [REF] 3.94 .25 5.33 max. 15.22 .25 13.97 .25 .25 [Typ.]
INCHES 2.070 max. .080 [REF] .100 [TP] .018 [Typ.] 1.900 .060 [Typ.] .130 .010 .020 [REF] .155 .010 .210 max. .600 .010 .550 .010 .010 [Typ.]
F D E C B M 0~15 I H J G 1 A K L 20 40 21
Each lead centerline is located within .25 mm[.01 inch] of its true position [TP] at maximum material condition.
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MX27C4100/27C4096
PACKAGE INFORMATION
44-PIN PLASTIC LEADED CHIP CARRIER(PLCC)
A
ITEM A B C D E F G H I J K L M N
MILLIMETERS 17.53 .12 16.59 .12 16.59 .12 17.53 .12 1.95 4.70 max. 2.55 .25 .51 min. 1.27 [Typ.] .71 .10 .46 .10 15.50 .51 .63 R .25 [Typ.]
INCHES .690 .005 .653 .005 .653 .005 .690 .005 .077 .185 max .100 .010 .020 min. .050 [Typ.] .028 .004 .018 .004 .610 .020 .025 R .010 [Typ.]
FG H I K 17 18 13 7 6
B 1 44
40 39
33
CD
29 23 28 E N M J L
40-PIN PLASTIC SOP(450 mil)
ITEM A B C D E F G H I J K
NOTE:
MILLIMETERS 26.06 .13 1.00 [REF] 1.27 [TP] .41 [Typ.] .102 min. 3.0 max. 2.695 .13 14.125 .26 11.303 .13 .203[Typ.] .785 .21
INCHES 1.026 .005 .038 [REF] .050 [TP] .016 [Typ.] .004 min. .118 max. .106 .005 .556 .010 .445 .005 .008 [Typ.] .031 .008
40
21
1 A
16
H I J
G
F K E
Each lead centerline is located within .25 mm[.01 inch] of its true position [TP] at maximum material condition.
D
C
B
L
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MX27C4100/27C4096
Revision History
Revision No. Description 3.0 1) Eliminate Interactive Programming Mode 2) 40-CDIP package quartz lens, change to square shape. 3.1 IPP1 100uA to 10uA Date 6/13/1997 7/17/1997
P/N: PM0197
REV. 3.1, JUL 17, 1997
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INDEX
MX27C4100/27C4096
MACRONIX INTERNATIONAL CO., LTD.
HEADQUARTERS:
TEL:+886-3-578-8888 FAX:+886-3-578-8887
EUROPE OFFICE:
TEL:+32-2-456-8020 FAX:+32-2-456-8021
JAPAN OFFICE:
TEL:+81-44-246-9100 FAX:+81-44-246-9105
SINGAPORE OFFICE:
TEL:+65-747-2309 FAX:+65-748-4090
TAIPEI OFFICE:
TEL:+886-3-509-3300 FAX:+886-3-509-2200
MACRONIX AMERICA, INC.
TEL:+1-408-453-8088 FAX:+1-408-453-8488
CHICAGO OFFICE:
TEL:+1-847-963-1900 FAX:+1-847-963-1909
http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the rignt to change product and specifications without notice.
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